[PATCH] D116580: [M68k] Add addressing modes ARIPI and ARIPD support for BTST
Jim Lin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 10 22:00:22 PST 2022
Jim updated this revision to Diff 398841.
Jim added a comment.
Rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116580/new/
https://reviews.llvm.org/D116580
Files:
llvm/lib/Target/M68k/M68kInstrBits.td
llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
Index: llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
===================================================================
--- llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
+++ llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
@@ -7,6 +7,20 @@
; CHECK-SAME: encoding: [0x03,0x10]
btst %d1, (%a0)
+; CHECK: btst %d0, (%a1)+
+; CHECK-SAME: encoding: [0x01,0x19]
+btst %d0, (%a1)+
+; CHECK: btst %d1, (%a0)+
+; CHECK-SAME: encoding: [0x03,0x18]
+btst %d1, (%a0)+
+
+; CHECK: btst %d0, -(%a1)
+; CHECK-SAME: encoding: [0x01,0x21]
+btst %d0, -(%a1)
+; CHECK: btst %d1, -(%a0)
+; CHECK-SAME: encoding: [0x03,0x20]
+btst %d1, -(%a0)
+
; CHECK: btst %d0, (-1,%a1)
; CHECK-SAME: encoding: [0x01,0x29,0xff,0xff]
btst %d0, (-1,%a1)
Index: llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
===================================================================
--- llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
+++ llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
@@ -7,6 +7,20 @@
; CHECK-SAME: encoding: [0x08,0x10,0x00,0xff]
btst #-1, (%a0)
+; CHECK: btst #0, (%a1)+
+; CHECK-SAME: encoding: [0x08,0x19,0x00,0x00]
+btst #0, (%a1)+
+; CHECK: btst #-1, (%a0)+
+; CHECK-SAME: encoding: [0x08,0x18,0x00,0xff]
+btst #-1, (%a0)+
+
+; CHECK: btst #0, -(%a1)
+; CHECK-SAME: encoding: [0x08,0x21,0x00,0x00]
+btst #0, -(%a1)
+; CHECK: btst #-1, -(%a0)
+; CHECK-SAME: encoding: [0x08,0x20,0x00,0xff]
+btst #-1, -(%a0)
+
; CHECK: btst #0, (-1,%a1)
; CHECK-SAME: encoding: [0x08,0x29,0x00,0x00,0xff,0xff]
btst #0, (-1,%a1)
Index: llvm/lib/Target/M68k/M68kInstrBits.td
===================================================================
--- llvm/lib/Target/M68k/M68kInstrBits.td
+++ llvm/lib/Target/M68k/M68kInstrBits.td
@@ -79,6 +79,10 @@
// Memory BTST limited to 8 bits only
def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat,
MxEncEAj_0, MxExtEmpty>;
+def BTST8od : MxBTST_MR<MxType8d, MxType8.OOp, MxType8.OPat,
+ MxEncEAo_0, MxExtEmpty>;
+def BTST8ed : MxBTST_MR<MxType8d, MxType8.EOp, MxType8.EPat,
+ MxEncEAe_0, MxExtEmpty>;
def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat,
MxEncEAp_0, MxExtI16_0>;
def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat,
@@ -90,6 +94,10 @@
def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat,
MxEncEAj_0, MxExtEmpty>;
+def BTST8oi : MxBTST_MI<MxType8d, MxType8.OOp, MxType8.OPat,
+ MxEncEAo_0, MxExtEmpty>;
+def BTST8ei : MxBTST_MI<MxType8d, MxType8.EOp, MxType8.EPat,
+ MxEncEAe_0, MxExtEmpty>;
def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat,
MxEncEAp_0, MxExtI16_0>;
def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat,
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