[PATCH] D117365: [InstCombine] optimize icmp-ugt-ashr
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 15 02:26:15 PST 2022
lebedev.ri added a comment.
Could you post the general proof, not for a single constant?
================
Comment at: lib/Transforms/InstCombine/InstCombineCompares.cpp:2242
if (IsAShr) {
if (Pred == CmpInst::ICMP_SLT || Pred == CmpInst::ICMP_ULT || IsExact) {
// When ShAmtC can be shifted losslessly:
----------------
As i have said in D117252, this should be
```
if (IsExact || Pred == CmpInst::ICMP_SLT || Pred == CmpInst::ICMP_ULT) {
```
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D117365/new/
https://reviews.llvm.org/D117365
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