[PATCH] D116664: [AArch64] Improve codegen for get.active.lane.mask when SVE is available

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15095
+    EVT VT = N->getValueType(0);
+    if (VT.isFixedLengthVector()) {
+      // We can use the SVE whilelo instruction to lower this intrinsic by
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sdesmalen wrote:
> nit: avoid indentation by doing `if (!VT.isFixedLengthVector()) return SDValue();` ?
It looks like it is worth adding an assert that SVE is available too.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116664/new/

https://reviews.llvm.org/D116664