[PATCH] D116664: [AArch64] Improve codegen for get.active.lane.mask when SVE is available

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

Nice improvement!



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15095
+    EVT VT = N->getValueType(0);
+    if (VT.isFixedLengthVector()) {
+      // We can use the SVE whilelo instruction to lower this intrinsic by
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nit: avoid indentation by doing `if (!VT.isFixedLengthVector()) return SDValue();` ?


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15121
+                        DAG.getConstant(0, DL, MVT::i64));
+      Res = DAG.getNode(ISD::TRUNCATE, DL, VT, Res);
+    }
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nit: add comment 'truncate v4i32 -> v4i1`


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https://reviews.llvm.org/D116664