[PATCH] D117111: [AArch64] Add native CPU detection for Ampere1
Philipp Tomsich via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 12 06:19:57 PST 2022
philipp.tomsich created this revision.
philipp.tomsich added reviewers: kristof.beyls, jgreenhalgh.
Herald added subscribers: dexonsmith, hiraditya.
philipp.tomsich requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Map the IMPLEMENTOR ID 0xc0 (Ampere Computing) and CPU ID 0xac3
(Ampere1) to "ampere1".
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117111
Files:
llvm/lib/Support/Host.cpp
llvm/unittests/Support/Host.cpp
Index: llvm/unittests/Support/Host.cpp
===================================================================
--- llvm/unittests/Support/Host.cpp
+++ llvm/unittests/Support/Host.cpp
@@ -125,6 +125,10 @@
"CPU part : 0xc01"),
"saphira");
+ EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n"
+ "CPU part : 0xac3"),
+ "ampere1");
+
// MSM8992/4 weirdness
StringRef MSM8992ProcCpuInfo = R"(
Processor : AArch64 Processor rev 3 (aarch64)
Index: llvm/lib/Support/Host.cpp
===================================================================
--- llvm/lib/Support/Host.cpp
+++ llvm/lib/Support/Host.cpp
@@ -294,6 +294,12 @@
}
}
+ if (Implementer == "0xc0") { // Ampere Computing
+ return StringSwitch<const char *>(Part)
+ .Case("0xac3", "ampere1")
+ .Default("generic");
+ }
+
return "generic";
}
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