[PATCH] D117079: [RISCV] Improve i64 splat vector lowering in RV32.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2218
+    if (LoC == HiC && Const && Const->getSExtValue() == RISCV::VLMaxSentinel) {
+      auto InterVT =
+          MVT::getScalableVectorVT(MVT::i32, 2 * VT.getVectorNumElements());
----------------
auto doesn't add anything here. It's more characters than MVT


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2220
+          MVT::getScalableVectorVT(MVT::i32, 2 * VT.getVectorNumElements());
+      // TODO: if vl <= min(VLMAX), we could also do this. But we could not
+      // access the subtarget here now.
----------------
could -> can


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117079/new/

https://reviews.llvm.org/D117079