[llvm] aff9f2d - [LICM] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 11 02:25:27 PST 2022
Author: Nikita Popov
Date: 2022-01-11T11:25:19+01:00
New Revision: aff9f2dc0160125569593965e44885b61ec9b67a
URL: https://github.com/llvm/llvm-project/commit/aff9f2dc0160125569593965e44885b61ec9b67a
DIFF: https://github.com/llvm/llvm-project/commit/aff9f2dc0160125569593965e44885b61ec9b67a.diff
LOG: [LICM] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/LICM/scalar-promote-unwind.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LICM/scalar-promote-unwind.ll b/llvm/test/Transforms/LICM/scalar-promote-unwind.ll
index 9c17764e2d48f..0662a23fe6be3 100644
--- a/llvm/test/Transforms/LICM/scalar-promote-unwind.ll
+++ b/llvm/test/Transforms/LICM/scalar-promote-unwind.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -basic-aa -licm -S | FileCheck %s
; RUN: opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,require<opt-remark-emit>,loop-mssa(licm)' -S %s | FileCheck %s
@@ -6,8 +7,26 @@ target triple = "x86_64-unknown-linux-gnu"
; Make sure we don't hoist the store out of the loop; %a would
; have the wrong value if f() unwinds
-
define void @test1(i32* nocapture noalias %a, i1 zeroext %y) uwtable {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[I_03:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A:%.*]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
+; CHECK-NEXT: store i32 [[ADD]], i32* [[A]], align 4
+; CHECK-NEXT: br i1 [[Y:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC]]
+; CHECK: if.then:
+; CHECK-NEXT: tail call void @f()
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_03]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -18,10 +37,6 @@ for.body:
store i32 %add, i32* %a, align 4
br i1 %y, label %if.then, label %for.inc
-; CHECK: define void @test1
-; CHECK: load i32, i32*
-; CHECK-NEXT: add
-; CHECK-NEXT: store i32
if.then:
tail call void @f()
@@ -38,8 +53,29 @@ for.cond.cleanup:
; We can hoist the store out of the loop here; if f() unwinds,
; the lifetime of %a ends.
-
define void @test2(i1 zeroext %y) uwtable {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[A_PROMOTED:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[ADD1:%.*]] = phi i32 [ [[A_PROMOTED]], [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_INC:%.*]] ]
+; CHECK-NEXT: [[I_03:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_INC]] ]
+; CHECK-NEXT: [[ADD]] = add nsw i32 [[ADD1]], 1
+; CHECK-NEXT: br i1 [[Y:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC]]
+; CHECK: if.then:
+; CHECK-NEXT: tail call void @f()
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_03]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_INC]] ]
+; CHECK-NEXT: store i32 [[ADD_LCSSA]], i32* [[A]], align 4
+; CHECK-NEXT: ret void
+;
entry:
%a = alloca i32
br label %for.body
@@ -61,20 +97,31 @@ for.inc:
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup:
-; CHECK: define void @test2
-; CHECK: store i32
-; CHECK-NEXT: ret void
ret void
}
;; We can promote if the load can be proven safe to speculate, and the
;; store safe to sink, even if the the store *isn't* must execute.
define void @test3(i1 zeroext %y) uwtable {
-; CHECK-LABEL: @test3
+; CHECK-LABEL: @test3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[A_PROMOTED:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[ADD1:%.*]] = phi i32 [ [[A_PROMOTED]], [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_03:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ADD]] = add nsw i32 [[ADD1]], 1
+; CHECK-NEXT: tail call void @f()
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_03]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ]
+; CHECK-NEXT: store i32 [[ADD_LCSSA]], i32* [[A]], align 4
+; CHECK-NEXT: ret void
+;
entry:
-; CHECK-LABEL: entry:
-; CHECK-NEXT: %a = alloca i32
-; CHECK-NEXT: %a.promoted = load i32, i32* %a, align 4
%a = alloca i32
br label %for.body
@@ -89,19 +136,30 @@ for.body:
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup:
-; CHECK-LABEL: for.cond.cleanup:
-; CHECK: store i32 %add.lcssa, i32* %a, align 4
-; CHECK-NEXT: ret void
ret void
}
;; Same as test3, but with unordered atomics
define void @test3b(i1 zeroext %y) uwtable {
-; CHECK-LABEL: @test3
+; CHECK-LABEL: @test3b(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[A_PROMOTED:%.*]] = load atomic i32, i32* [[A]] unordered, align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[ADD1:%.*]] = phi i32 [ [[A_PROMOTED]], [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I_03:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ADD]] = add nsw i32 [[ADD1]], 1
+; CHECK-NEXT: tail call void @f()
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_03]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ]
+; CHECK-NEXT: store atomic i32 [[ADD_LCSSA]], i32* [[A]] unordered, align 4
+; CHECK-NEXT: ret void
+;
entry:
-; CHECK-LABEL: entry:
-; CHECK-NEXT: %a = alloca i32
-; CHECK-NEXT: %a.promoted = load atomic i32, i32* %a unordered, align 4
%a = alloca i32
br label %for.body
@@ -116,9 +174,6 @@ for.body:
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup:
-; CHECK-LABEL: for.cond.cleanup:
-; CHECK: store atomic i32 %add.lcssa, i32* %a unordered, align 4
-; CHECK-NEXT: ret void
ret void
}
@@ -128,6 +183,55 @@ for.cond.cleanup:
; Make sure this edge is treated as a loop exit, and that the loads and stores are promoted as
; expected
define void @loop_within_tryblock() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: @loop_within_tryblock(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[A_PROMOTED:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: [[ADD1:%.*]] = phi i32 [ [[A_PROMOTED]], [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_INC:%.*]] ]
+; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_INC]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 1024
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[ADD]] = add nsw i32 [[ADD1]], 1
+; CHECK-NEXT: invoke void @boo()
+; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK: invoke.cont:
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
+; CHECK-NEXT: br label [[FOR_COND]]
+; CHECK: lpad:
+; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*)
+; CHECK-NEXT: store i32 [[ADD_LCSSA]], i32* [[A]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i8*, i32 } [[TMP0]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP0]], 1
+; CHECK-NEXT: br label [[CATCH_DISPATCH:%.*]]
+; CHECK: catch.dispatch:
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
+; CHECK-NEXT: [[MATCHES:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: br i1 [[MATCHES]], label [[CATCH:%.*]], label [[EH_RESUME:%.*]]
+; CHECK: catch:
+; CHECK-NEXT: [[TMP4:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP1]])
+; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to i32*
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
+; CHECK-NEXT: call void @__cxa_end_catch()
+; CHECK-NEXT: br label [[TRY_CONT:%.*]]
+; CHECK: try.cont:
+; CHECK-NEXT: ret void
+; CHECK: for.end:
+; CHECK-NEXT: [[ADD1_LCSSA:%.*]] = phi i32 [ [[ADD1]], [[FOR_COND]] ]
+; CHECK-NEXT: store i32 [[ADD1_LCSSA]], i32* [[A]], align 4
+; CHECK-NEXT: br label [[TRY_CONT]]
+; CHECK: eh.resume:
+; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[TMP1]], 0
+; CHECK-NEXT: [[LPAD_VAL3:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[TMP2]], 1
+; CHECK-NEXT: resume { i8*, i32 } [[LPAD_VAL3]]
+;
entry:
%a = alloca i32, align 4
store i32 0, i32* %a, align 4
@@ -138,16 +242,12 @@ for.cond:
%cmp = icmp slt i32 %i.0, 1024
br i1 %cmp, label %for.body, label %for.end
-; CHECK: for.body:
-; CHECK-NOT: load
-; CHECK-NOT: store
-; CHECK: invoke
for.body:
%0 = load i32, i32* %a, align 4
%add = add nsw i32 %0, 1
store i32 %add, i32* %a, align 4
invoke void @boo()
- to label %invoke.cont unwind label %lpad
+ to label %invoke.cont unwind label %lpad
invoke.cont:
br label %for.inc
@@ -156,12 +256,9 @@ for.inc:
%inc = add nsw i32 %i.0, 1
br label %for.cond
-; CHECK: lpad:
-; CHECK: store
-; CHECK: br
lpad:
%1 = landingpad { i8*, i32 }
- catch i8* bitcast (i8** @_ZTIi to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
%2 = extractvalue { i8*, i32 } %1, 0
%3 = extractvalue { i8*, i32 } %1, 1
br label %catch.dispatch
@@ -193,15 +290,52 @@ eh.resume:
; The malloc'ed memory is not capture and therefore promoted.
define void @malloc_no_capture() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: @malloc_no_capture(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CALL:%.*]] = call i8* @malloc(i64 4)
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
+; CHECK-NEXT: [[DOTPROMOTED:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[ADD1:%.*]] = phi i32 [ [[DOTPROMOTED]], [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_LATCH:%.*]] ]
+; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_LATCH]] ]
+; CHECK-NEXT: [[ADD]] = add nsw i32 [[ADD1]], 1
+; CHECK-NEXT: br label [[FOR_CALL:%.*]]
+; CHECK: for.call:
+; CHECK-NEXT: invoke void @boo()
+; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK: invoke.cont:
+; CHECK-NEXT: br label [[FOR_LATCH]]
+; CHECK: for.latch:
+; CHECK-NEXT: [[INC]] = add i32 [[I_0]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 1024
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
+; CHECK: for.end:
+; CHECK-NEXT: [[ADD_LCSSA2:%.*]] = phi i32 [ [[ADD]], [[FOR_LATCH]] ]
+; CHECK-NEXT: store i32 [[ADD_LCSSA2]], i32* [[TMP0]], align 4
+; CHECK-NEXT: br label [[FUN_RET:%.*]]
+; CHECK: lpad:
+; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_CALL]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: catch i8* null
+; CHECK-NEXT: store i32 [[ADD_LCSSA]], i32* [[TMP0]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
+; CHECK-NEXT: br label [[CATCH:%.*]]
+; CHECK: catch:
+; CHECK-NEXT: [[TMP4:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP2]])
+; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP0]] to i8*
+; CHECK-NEXT: call void @free(i8* [[TMP5]])
+; CHECK-NEXT: call void @__cxa_end_catch()
+; CHECK-NEXT: br label [[FUN_RET]]
+; CHECK: fun.ret:
+; CHECK-NEXT: ret void
+;
entry:
%call = call i8* @malloc(i64 4)
%0 = bitcast i8* %call to i32*
br label %for.body
-; CHECK: for.body:
-; CHECK-NOT: load
-; CHECK-NOT: store
-; CHECK: br
for.body:
%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.latch ]
%1 = load i32, i32* %0, align 4
@@ -211,7 +345,7 @@ for.body:
for.call:
invoke void @boo()
- to label %invoke.cont unwind label %lpad
+ to label %invoke.cont unwind label %lpad
invoke.cont:
br label %for.latch
@@ -226,7 +360,7 @@ for.end:
lpad:
%2 = landingpad { i8*, i32 }
- catch i8* null
+ catch i8* null
%3 = extractvalue { i8*, i32 } %2, 0
%4 = extractvalue { i8*, i32 } %2, 1
br label %catch
@@ -244,15 +378,49 @@ fun.ret:
; The malloc'ed memory can be captured and therefore not promoted.
define void @malloc_capture(i32** noalias %A) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: @malloc_capture(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CALL:%.*]] = call i8* @malloc(i64 4)
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_LATCH:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], 1
+; CHECK-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4
+; CHECK-NEXT: br label [[FOR_CALL:%.*]]
+; CHECK: for.call:
+; CHECK-NEXT: invoke void @boo_readnone()
+; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK: invoke.cont:
+; CHECK-NEXT: br label [[FOR_LATCH]]
+; CHECK: for.latch:
+; CHECK-NEXT: store i32* [[TMP0]], i32** [[A:%.*]], align 8
+; CHECK-NEXT: [[INC]] = add i32 [[I_0]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 1024
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
+; CHECK: for.end:
+; CHECK-NEXT: br label [[FUN_RET:%.*]]
+; CHECK: lpad:
+; CHECK-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: catch i8* null
+; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
+; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
+; CHECK-NEXT: br label [[CATCH:%.*]]
+; CHECK: catch:
+; CHECK-NEXT: [[TMP5:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP3]])
+; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP0]] to i8*
+; CHECK-NEXT: call void @free(i8* [[TMP6]])
+; CHECK-NEXT: call void @__cxa_end_catch()
+; CHECK-NEXT: br label [[FUN_RET]]
+; CHECK: fun.ret:
+; CHECK-NEXT: ret void
+;
entry:
%call = call i8* @malloc(i64 4)
%0 = bitcast i8* %call to i32*
br label %for.body
-; CHECK: for.body:
-; CHECK: load
-; CHECK: store
-; CHECK: br
for.body:
%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.latch ]
%1 = load i32, i32* %0, align 4
@@ -262,13 +430,13 @@ for.body:
for.call:
invoke void @boo_readnone()
- to label %invoke.cont unwind label %lpad
+ to label %invoke.cont unwind label %lpad
invoke.cont:
br label %for.latch
for.latch:
- store i32* %0, i32** %A
+ store i32* %0, i32** %A
%inc = add i32 %i.0, 1
%cmp = icmp slt i32 %i.0, 1024
br i1 %cmp, label %for.body, label %for.end
@@ -278,7 +446,7 @@ for.end:
lpad:
%2 = landingpad { i8*, i32 }
- catch i8* null
+ catch i8* null
%3 = extractvalue { i8*, i32 } %2, 0
%4 = extractvalue { i8*, i32 } %2, 1
br label %catch
@@ -300,7 +468,7 @@ declare noalias i8* @malloc(i64)
; Function Attrs: nounwind
declare void @free(i8* nocapture)
-declare void @boo()
+declare void @boo()
; This is an artifical example, readnone functions by definition cannot unwind
; exceptions by calling the C++ exception throwing methods
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