[PATCH] D116798: [RISCV] Select vl op to X0 when it is equal to ~0.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:1738
+  if (C && (isUInt<5>(C->getZExtValue()) ||
+            C->getZExtValue() == RISCV::VLMaxSentinel))
     VL = CurDAG->getTargetConstant(C->getZExtValue(), SDLoc(N),
----------------
craig.topper wrote:
> craig.topper wrote:
> > I don't think this works on RV32. getZExtValue would return 0xffffffff but VLMaxSentinel is 0xffffffffffffffff. I might be wrong. Please check.
> I think getSExtValue would work if I'm correct that the issue exists.
Thanks, you are right, I changed to getSExtValue.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116798/new/

https://reviews.llvm.org/D116798