[llvm] 137642f - [Hexagon] Reject accumulating on vd.tmp

[Krzysztof Parzyszek via llvm-commits]

Author: Yuanxiang Ye
Date: 2022-01-07T11:13:19-08:00
New Revision: 137642f433c6f417c8526ad88f82b1de6bf9a78f

URL: https://github.com/llvm/llvm-project/commit/137642f433c6f417c8526ad88f82b1de6bf9a78f
DIFF: https://github.com/llvm/llvm-project/commit/137642f433c6f417c8526ad88f82b1de6bf9a78f.diff

LOG: [Hexagon] Reject accumulating on vd.tmp

Added hvx accum checker function and test cases.

Added: 
    llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
    llvm/test/MC/Hexagon/hvx-tmp-accum.s

Modified: 
    llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
    llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
index 84f62da269b6..8a866cfe9161 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
@@ -234,9 +234,10 @@ bool HexagonMCChecker::check(bool FullCheck) {
   bool chkHWLoop = checkHWLoop();
   bool chkValidTmpDst = FullCheck ? checkValidTmpDst() : true;
   bool chkLegalVecRegPair = checkLegalVecRegPair();
+  bool ChkHVXAccum = checkHVXAccum();
   bool chk = chkP && chkNV && chkR && chkRRO && chkS && chkSh && chkSl &&
              chkAXOK && chkCofMax1 && chkHWLoop && chkValidTmpDst &&
-             chkLegalVecRegPair;
+             chkLegalVecRegPair && ChkHVXAccum;
 
   return chk;
 }
@@ -815,3 +816,22 @@ bool HexagonMCChecker::checkLegalVecRegPair() {
   }
   return true;
 }
+
+// Vd.tmp can't be accumulated
+bool HexagonMCChecker::checkHVXAccum()
+{
+  for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
+    bool IsTarget =
+        HexagonMCInstrInfo::isAccumulator(MCII, I) && I.getOperand(0).isReg();
+    if (!IsTarget)
+      continue;
+    unsigned int R = I.getOperand(0).getReg();
+    TmpDefsIterator It = TmpDefs.find(R);
+    if (It != TmpDefs.end()) {
+      reportError("register `" + Twine(RI.getName(R)) + ".tmp" +
+                  "' is accumulated in this packet");
+      return false;
+    }
+  }
+  return true;
+}

diff  --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
index 4d3a0f0c4cbd..b83931eb88ac 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
@@ -104,6 +104,7 @@ class HexagonMCChecker {
   bool checkCOFMax1();
   bool checkLegalVecRegPair();
   bool checkValidTmpDst();
+  bool checkHVXAccum();
 
   static void compoundRegisterMap(unsigned &);
 

diff  --git a/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s b/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
new file mode 100644
index 000000000000..0bef6c823d18
--- /dev/null
+++ b/llvm/test/MC/Hexagon/hvx-tmp-accum-no-erros.s
@@ -0,0 +1,37 @@
+# RUN: llvm-mc -arch=hexagon -mattr=+hvxv68 -filetype=obj %s | llvm-objdump --mattr=+hvxv68 -d - | FileCheck %s
+
+# packet w/accum with register 
diff erent from one loaded to
+{
+    v1.tmp = vmem(r0+#0)
+    v0.w += vrmpy(v1.b,v2.b)
+}
+
+# CHECK: { v0.w += vrmpy(v1.b,v2.b)
+# CHECK-NEXT:  v1.tmp = vmem(r0+#0) }
+
+# packet w/accum and store or other non-def register use
+{
+    v1.tmp = vmem(r0+#0)
+    v0 += vrmpyub(v1, v3)
+    vmem(r0) = v0
+}
+
+# CHECK: { v0.uw += vrmpy(v1.ub,v3.ub)
+# CHECK-NEXT:  v1.tmp = vmem(r0+#0)
+# CHECK-NEXT:  vmem(r0+#0) = v0 }
+
+# packet w/non-accum and otherwise-legal register def/use
+{
+    v0.tmp =vmem(r2+#0)
+    Q3 = vcmp.eq(v0.w, v5.w)
+}
+
+# CHECK: { q3 = vcmp.eq(v0.w,v5.w)
+# CHECK-NEXT: v0.tmp = vmem(r2+#0) }
+
+# scalar "accums" unaffected by this change.
+{
+    r0 += add(r1, r2)
+}
+
+# CHECK { r0 += add(r1,r2) }

diff  --git a/llvm/test/MC/Hexagon/hvx-tmp-accum.s b/llvm/test/MC/Hexagon/hvx-tmp-accum.s
new file mode 100644
index 000000000000..d5871696bb9b
--- /dev/null
+++ b/llvm/test/MC/Hexagon/hvx-tmp-accum.s
@@ -0,0 +1,12 @@
+# RUN: not llvm-mc -arch=hexagon -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
+{
+    v0.tmp = vmem(r0+#0)
+    v0 += vrmpyub(v1, r1)
+}
+# CHECK: error: register `V0.tmp' is accumulated in this packet
+
+{
+    v1.tmp = vmem(r0+#0)
+    v1.w += vrmpy(v1.b,v2.b)
+}
+# CHECK: error: register `V1.tmp' is accumulated in this packet