[PATCH] D116749: [AArch64][SVE] Fold predicate into compare

[David Sherwood via Phabricator via llvm-commits]

david-arm added a comment.

Nice improvement @c-rhodes! Just a couple of suggestions ...



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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:4644
             (cmp $Op1, $Op3, $Op2)>;
+  def : Pat<(predvt (and predvt:$Pg, (AArch64setcc_z (predvt (AArch64ptrue 31)), intvt:$Op2, intvt:$Op3, cc))),
+            (cmp $Pg, $Op2, $Op3)>;
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I do wonder if it's also worth creating patterns for ands matching the first operand too, i.e.

  def : Pat<(predvt (and (AArch64setcc_z (predvt (AArch64ptrue 31)), intvt:$Op2, intvt:$Op3, cc))),
            (cmp $Pg, $Op2, $Op3), predvt:$Pg>;

I'm thinking about the case where only one input to the `and` instruction is a `setcc`, i.e. see my comment about writing other test cases below.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll:967
+; Verify general predicate is folded into the compare
+define <vscale x 4 x i1> @predicated_icmp(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
+; CHECK-LABEL: predicated_icmp:
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Hi @c-rhodes, given your patterns also work for any general predicate for the first operand of `and` can you also add a testcase that demonstrates this? For example, something like:

  define <vscale x 4 x i1> @predicated_icmp_unknown_lhs(<vscale x 4 x i1> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
    %icmp = icmp sle <vscale x 4 x i32> %b, %c
    %and = and <vscale x 4 x i1> %a, %icmp
    ret <vscale x 4 x i1> %and
  }

I'd expect to see this code being produced:
  ; CHECK:       // %bb.0:
  ; CHECK-NEXT:    cmpge p0.s, p0/z, z2.s, z1.s
  ; CHECK-NEXT:    ret



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