[PATCH] D116765: [x86] make select lowering using SBB hack more flexible

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:24565
       }
-
-      Cmp = DAG.getNode(X86ISD::SUB, DL, CmpVTs,
-                        CmpOp0, DAG.getConstant(1, DL, CmpOp0.getValueType()));
-
+      // TODO: Can this be undef? We don't need "0 - 0" here. We only need to
+      //       constrain the operands so any 1 register is used for both ops.
----------------
Might be able to use X86ISD::SETCC_CARRY? Though SBB with identical source is only recognized as a special case on AMD CPUs last I knew.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116765/new/

https://reviews.llvm.org/D116765