[PATCH] D116019: [RISCV][NFC] Use foreach to refactor vector load/store whole register instructions' definition.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan added a comment.

In D116019#3224688 <https://reviews.llvm.org/D116019#3224688>, @asb wrote:

> Thanks for the patch Jianjian. This is a matter of personal taste, so I'll happily defer to those who are more actively contributing to the RVV tablegen files, but IMHO the reduced readability due to the casts and string concatenation in the new version mean it's not clear this is an improvement over the current code.

Thanks for your advice, I will close this one.


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  https://reviews.llvm.org/D116019/new/

https://reviews.llvm.org/D116019