[PATCH] D116724: [RISCV] Change RISCVISD::FCVT*RTZ opcodes to take rounding mode as an operand.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 6 08:12:43 PST 2022


This revision was automatically updated to reflect the committed changes.
Closed by commit rG808c66266539: [RISCV] Change RISCVISD::FCVT*RTZ opcodes to take rounding mode as an operand. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116724/new/

https://reviews.llvm.org/D116724

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td

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