[PATCH] D116737: [DAG][AArch64][SVE] Fix VLS mulh code generation

[David Truby via Phabricator via llvm-commits]

DavidTruby created this revision.
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Introducing lowering for extending loads regressed an optimisation in
VLS codegen. Since the extend is merged into the load before the mulh is
generated, a standard mul followed by a lsr and truncating store is used
instead. This patch causes the mulh to be generated before the extends
are merged into the loads.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D116737

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll

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