[PATCH] D116468: [AArch64] Combine ADD/SUB instructions when they contain a 24-bit immediate.

[Micah Weston via Phabricator via llvm-commits]

red1bluelost updated this revision to Diff 397195.
red1bluelost added a comment.

Forgot one of the files in the update.

Sorry, I'm getting used to patches and arcanist.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116468/new/

https://reviews.llvm.org/D116468

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/CodeGen/MachineCombiner.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/aarch64-combine-addsub-24bit-imm.mir
  llvm/test/CodeGen/AArch64/aarch64-combine-addsub-imm-reject-loop.mir
  llvm/test/CodeGen/AArch64/addsub.ll
  llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll

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