[PATCH] D116468: [AArch64] Combine ADD/SUB instructions when they contain a 24-bit immediate.

[Micah Weston via Phabricator via llvm-commits]

red1bluelost updated this revision to Diff 397192.
red1bluelost added a comment.

Addresses feedback for patch.

A test file, `aarch64-combine-addsub-imm-reject-loop.mir`, was added to check 
if the ADD/SUB combine would affect loop invariants hoisting, showing a regression.
To fix the regression, a `CombinerObjective` was added for these
`MachineCombinerPattern`s that they must not exist in a loop. During machine
combining, these patterns will check if the `Root` is inside a loop, skipping the
combine if that condition holds.

To address the priority to keep 16-bit immediates as MOV-ADD, a few tests were
added to `aarch64-combine-addsub-24bit-imm.mir` and code modifications. Now, 24-bit
immediates must use bits 23-16 so that it guarentees the combine only reduces
MOV-MOV-ADD to ADDI-ADDI.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116468/new/

https://reviews.llvm.org/D116468

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/CodeGen/MachineCombiner.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/aarch64-combine-addsub-24bit-imm.mir
  llvm/test/CodeGen/AArch64/addsub.ll
  llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D116468.397192.patch
Type: text/x-patch
Size: 36845 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220104/ec105881/attachment.bin>