[PATCH] D116307: [RISCV] Teach VSETVLInsert to eliminate redundant vsetvli for vmv.s.x and vfmv.s.f.

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 29 22:44:20 PST 2021


jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:159
 
+  bool hasSameSEW(const VSETVLIInfo &Other) const {
+    assert(isValid() && Other.isValid() &&
----------------
craig.topper wrote:
> jacquesguan wrote:
> > craig.topper wrote:
> > > Is this used?
> > Done, now use the SEW and policy instead of VTYPE in the condition, because these instructions ignore the LMUL.
> Add this assert from hasSameVTYPE
> 
> ```
>     assert(!SEWLMULRatioOnly && !Other.SEWLMULRatioOnly &&
>            "Can't compare when only LMUL/SEW ratio is valid.");
> ```
Done


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116307/new/

https://reviews.llvm.org/D116307



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