[PATCH] D116307: [RISCV] Teach VSETVLInsert to eliminate redundant vsetvli for vmv.s.x and vfmv.s.f.

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 29 22:43:57 PST 2021


jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:259
+    // situation.
+    if (InstrInfo.ScalarMovOp && InstrInfo.hasAVLImm() &&
+        ((hasNonZeroAVL() && InstrInfo.hasNonZeroAVL()) ||
----------------
craig.topper wrote:
> Add `!Strict` to this.
Done


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:259
 
+    // For vmv.s.x and vfmv.s.f, there is only two behaves, VL = 0 and VL > 0.
+    // So it's compatible when we could make sure that all two VL be the same
----------------
craig.topper wrote:
> craig.topper wrote:
> >  behaves -> behaviors?
> This comment was not addressed
Done


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116307/new/

https://reviews.llvm.org/D116307



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