[llvm] 7171af7 - [SLP][NFC]Add a test for shuffled entries with different vector sizes,

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2021-12-27T07:35:35-08:00
New Revision: 7171af744543433ac75b232eb7dfdaef7efd4d7a

URL: https://github.com/llvm/llvm-project/commit/7171af744543433ac75b232eb7dfdaef7efd4d7a
DIFF: https://github.com/llvm/llvm-project/commit/7171af744543433ac75b232eb7dfdaef7efd4d7a.diff

LOG: [SLP][NFC]Add a test for shuffled entries with different vector sizes,
NFC.

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/shuffled-gathers-diff-size.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/shuffled-gathers-
diff -size.ll b/llvm/test/Transforms/SLPVectorizer/X86/shuffled-gathers-
diff -size.ll
new file mode 100644
index 0000000000000..5e70a05ee5b27
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/shuffled-gathers-
diff -size.ll
@@ -0,0 +1,73 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -slp-vectorizer -S -mtriple=x86_64-unknown-linux -slp-threshold=-2 | FileCheck %s
+
+define void @foo(i32* noalias nocapture writeonly %B, i32* noalias nocapture readonly %A, i32* noalias nocapture readonly %C, i32 %n, i32 %m) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A:%.*]], align 4
+; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[N:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[C:%.*]], align 4
+; CHECK-NEXT:    [[MUL2:%.*]] = mul nsw i32 [[TMP1]], [[M:%.*]]
+; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[MUL2]], [[MUL]]
+; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 1
+; CHECK-NEXT:    [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
+; CHECK-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[ADD]], [[TMP2]]
+; CHECK-NEXT:    store i32 [[MUL4]], i32* [[B:%.*]], align 4
+; CHECK-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 1
+; CHECK-NEXT:    [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4
+; CHECK-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[TMP3]], [[M]]
+; CHECK-NEXT:    [[ADD10:%.*]] = add nsw i32 [[MUL9]], [[MUL]]
+; CHECK-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 2
+; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; CHECK-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[ADD10]], [[TMP4]]
+; CHECK-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 1
+; CHECK-NEXT:    store i32 [[MUL12]], i32* [[ARRAYIDX13]], align 4
+; CHECK-NEXT:    [[MUL15:%.*]] = mul nsw i32 [[TMP2]], [[N]]
+; CHECK-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP4]], [[M]]
+; CHECK-NEXT:    [[ADD18:%.*]] = add nsw i32 [[MUL17]], [[MUL15]]
+; CHECK-NEXT:    [[MUL20:%.*]] = mul nsw i32 [[ADD18]], [[TMP0]]
+; CHECK-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2
+; CHECK-NEXT:    store i32 [[MUL20]], i32* [[ARRAYIDX21]], align 4
+; CHECK-NEXT:    [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 3
+; CHECK-NEXT:    [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX24]], align 4
+; CHECK-NEXT:    [[MUL25:%.*]] = mul nsw i32 [[TMP5]], [[M]]
+; CHECK-NEXT:    [[ADD26:%.*]] = add nsw i32 [[MUL25]], [[MUL15]]
+; CHECK-NEXT:    [[MUL28:%.*]] = mul nsw i32 [[ADD26]], [[TMP1]]
+; CHECK-NEXT:    [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3
+; CHECK-NEXT:    store i32 [[MUL28]], i32* [[ARRAYIDX29]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %0 = load i32, i32* %A, align 4
+  %mul = mul nsw i32 %0, %n
+  %1 = load i32, i32* %C, align 4
+  %mul2 = mul nsw i32 %1, %m
+  %add = add nsw i32 %mul2, %mul
+  %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 1
+  %2 = load i32, i32* %arrayidx3, align 4
+  %mul4 = mul nsw i32 %add, %2
+  store i32 %mul4, i32* %B, align 4
+  %arrayidx8 = getelementptr inbounds i32, i32* %C, i64 1
+  %3 = load i32, i32* %arrayidx8, align 4
+  %mul9 = mul nsw i32 %3, %m
+  %add10 = add nsw i32 %mul9, %mul
+  %arrayidx11 = getelementptr inbounds i32, i32* %C, i64 2
+  %4 = load i32, i32* %arrayidx11, align 4
+  %mul12 = mul nsw i32 %add10, %4
+  %arrayidx13 = getelementptr inbounds i32, i32* %B, i64 1
+  store i32 %mul12, i32* %arrayidx13, align 4
+  %mul15 = mul nsw i32 %2, %n
+  %mul17 = mul nsw i32 %4, %m
+  %add18 = add nsw i32 %mul17, %mul15
+  %mul20 = mul nsw i32 %add18, %0
+  %arrayidx21 = getelementptr inbounds i32, i32* %B, i64 2
+  store i32 %mul20, i32* %arrayidx21, align 4
+  %arrayidx24 = getelementptr inbounds i32, i32* %C, i64 3
+  %5 = load i32, i32* %arrayidx24, align 4
+  %mul25 = mul nsw i32 %5, %m
+  %add26 = add nsw i32 %mul25, %mul15
+  %mul28 = mul nsw i32 %add26, %1
+  %arrayidx29 = getelementptr inbounds i32, i32* %B, i64 3
+  store i32 %mul28, i32* %arrayidx29, align 4
+  ret void
+}