[PATCH] D116310: [RISCV] Support passing scalable vectur values through the stack.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai created this revision.
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After consuming all vector registers, the scalable vector values will be
passed indirectly. The pointer values will be saved in general
registers. If all general registers are used up, we will report an error to
notify users the compiler does not support passing scalable vector
values through the stack. In this patch, we remove the restriction. After
all general registers are used up, we use the stack to save the
pointers which point to the indirect passed scalable vector values.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D116310

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
  llvm/test/CodeGen/RISCV/rvv/unsupported-calling-conv.ll

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