[PATCH] D115975: [RISCV] Disable interleaving scalar loops in the loop vectorizer.
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 22 08:07:32 PST 2021
luismarques accepted this revision.
luismarques added a comment.
This revision is now accepted and ready to land.
LGTM.
================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=riscv64 -mattr=+experimental-v -loop-vectorize < %s | FileCheck %s
----------------
Remove this.
================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll:38
+ %iv1 = add i32 %iv, 1
+; %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %cond = icmp eq i32 %iv1, %size
----------------
?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115975/new/
https://reviews.llvm.org/D115975
More information about the llvm-commits
mailing list