[PATCH] D116042: [AMDGPU][InstCombine] Remove zero LOD bias
Sebastian Neubauer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 20 08:30:05 PST 2021
sebastian-ne added a comment.
In D116042#3202985 <https://reviews.llvm.org/D116042#3202985>, @foad wrote:
> If we do it at the IR level, why do we need this patch?
Oh, my question was meant to ask if I should do 1. push this patch, 2. move all combines to IR combines, or if it should be 1. move the existing optimizations to IR combines, 2. implement the zero bias optimization as IR combine.
> I think optimizations should only be repeated in codegen if they could plausibly show up as a result of legalization exposing the pattern
I interpret this as: We shall implement these three optimizations as IR combines and remove them from the code generation (as compared to duplicate the code as IR combine and leave it in codgen)?
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