[PATCH] D116042: [AMDGPU][InstCombine] Remove zero LOD bias
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 20 08:18:12 PST 2021
arsenm added a comment.
In D116042#3202958 <https://reviews.llvm.org/D116042#3202958>, @sebastian-ne wrote:
> Remove the isNegative check from GlobalISel and add tests to the pre-committed test files.
>
>> Could this be done at the IR level instead, in AMDGPUInstCombineIntrinsic?
>
> I think so. All the three combines (l -> lz, mip -> nomip and bias -> nobias) can probably be combines. It’s on my todo list, do you think it should be done before this patch?
I think optimizations should only be repeated in codegen if they could plausibly show up as a result of legalization exposing the pattern
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https://reviews.llvm.org/D116042/new/
https://reviews.llvm.org/D116042
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