[PATCH] D116042: [AMDGPU][InstCombine] Remove zero LOD bias
Sebastian Neubauer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 20 08:14:46 PST 2021
sebastian-ne updated this revision to Diff 395458.
sebastian-ne marked an inline comment as done.
sebastian-ne added a comment.
Remove the isNegative check from GlobalISel and add tests to the pre-committed test files.
> Could this be done at the IR level instead, in AMDGPUInstCombineIntrinsic?
I think so. All the three combines (l -> lz, mip -> nomip and bias -> nobias) can probably be combines. It’s on my todo list, do you think it should be done before this patch?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116042/new/
https://reviews.llvm.org/D116042
Files:
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/MIMGInstructions.td
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.bias_zero.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.bias_zero.ll
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