[PATCH] D115881: [WIP][AMDGPU][GlobalISel] Add patterns for no-return atomic ops with single address and data in tblgen.

[Abinav Puthan Purayil via Phabricator via llvm-commits]

abinavpp planned changes to this revision.
abinavpp added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:130
+: DS_Pseudo<opName,
+  (outs data_op:$vdst), // FIXME: Empty (outs) is not working in global-isel.
+  (ins VGPR_32:$addr, getLdStRegisterOperand<rc>.ret:$data0, offset:$offset, gds:$gds),
----------------
This is incorrect, breaking the MC tests and might be related to the change in
SIInsertWaitcnts behaviour in some of the modified tests. How can we fix this?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115881/new/

https://reviews.llvm.org/D115881