[PATCH] D109969: AMDGPU/GlobalISel: Add isel patterns for min3 and max3
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 15 16:32:55 PST 2021
arsenm added a comment.
In D109969#3196114 <https://reviews.llvm.org/D109969#3196114>, @arsenm wrote:
> My main worry here would be the constant bus restriction handling. Can you add tests for every permutation of SGPR and VGPR operands?
I'm pretty sure these already exist for the DAG path, should be able to just copy them
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https://reviews.llvm.org/D109969/new/
https://reviews.llvm.org/D109969
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