[PATCH] D109969: AMDGPU/GlobalISel: Add isel patterns for min3 and max3

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 15 16:31:57 PST 2021


arsenm added a comment.

My main worry here would be the constant bus restriction handling. Can you add tests for every permutation of SGPR and VGPR operands?


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