[PATCH] D115540: [RISCV] Add mayRaiseFPException to RISCV scalar FP instructions.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 14 09:37:09 PST 2021
craig.topper added a comment.
In D115540#3191993 <https://reviews.llvm.org/D115540#3191993>, @asb wrote:
> I gather from this patch that the only operations that don't have mayRaiseFPException=1 are:
>
> - fclass.*
> - fsgnj.*
> - fsgnjn.*
> - fsgnjx.*
>
> All the above are explicitly documented as not setting FP exception flags in the RISC-V ISA manual.
>
> Should the fmv instruction also have mayRaiseFPException=0?
You're right. I did miss the fmv instructions.
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https://reviews.llvm.org/D115540/new/
https://reviews.llvm.org/D115540
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