[PATCH] D115540: [RISCV] Add mayRaiseFPException to RISCV scalar FP instructions.

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

I gather from this patch that the only operations that don't have mayRaiseFPException=1 are:

- fclass.*
- fsgnj.*
- fsgnjn.*
- fsgnjx.*

All the above are explicitly documented as not setting FP exception flags in the RISC-V ISA manual.

Should the fmv instruction also have mayRaiseFPException=0?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D115540/new/

https://reviews.llvm.org/D115540