[PATCH] D115123: [VPlan] Add Debugloc to VPInstruction (NFC).

Mon Dec 13 03:33:02 PST 2021

Ayal added a comment.

In D115123#3188465 <https://reviews.llvm.org/D115123#3188465>, @fhahn wrote:

> In D115123#3188336 <https://reviews.llvm.org/D115123#3188336>, @Ayal wrote:
>
>> Could actual DLs be conveyed, to exercise it, e.g., by associating the DL of ICmpULE with the comparison controlling the original loop?
>> Finding a DL for FirstOrderRecurrenceSplice seems hard(er), perhaps the instruction feeding the next iteration(?).
>> (Avoid defaulting DL to none in the spirit of MLIR?)
>
> I think for the uses in D113223 <https://reviews.llvm.org/D113223> there already is a debug location in all cases. The reason for making it optional were other places where VPInstructions are created.

Yes, this motivation of D113223 <https://reviews.llvm.org/D113223> is clear from the summary.

> But I updated the patch to make it non-optional and push the responsiblity to the places where instructions are created. I think in most cases we potentially have a location available and I tried to use it.

Very good! Is it possible to test?

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https://reviews.llvm.org/D115123