[PATCH] D115123: [VPlan] Add Debugloc to VPInstruction (NFC).

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 393827.
fhahn added a comment.
Herald added a subscriber: bmahjour.



In D115123#3188336 <https://reviews.llvm.org/D115123#3188336>, @Ayal wrote:

> Could actual DLs be conveyed, to exercise it, e.g., by associating the DL of ICmpULE with the comparison controlling the original loop?
> Finding a DL for FirstOrderRecurrenceSplice seems hard(er), perhaps the instruction feeding the next iteration(?).
> (Avoid defaulting DL to none in the spirit of MLIR?)

I think for the uses in D113223 <https://reviews.llvm.org/D113223> there already is a debug location in all cases. The reason for making it optional were other places where VPInstructions are created. But I updated the patch to make it non-optional and push the responsiblity to the places where instructions are created. I think in most cases we potentially have a location available and I tried to use it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115123/new/

https://reviews.llvm.org/D115123

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/VPlan.cpp
  llvm/lib/Transforms/Vectorize/VPlan.h
  llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
  llvm/lib/Transforms/Vectorize/VPlanSLP.cpp

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