[PATCH] D115547: [X86] Adjust some IceLake integer shuffle schedule classes (PR48110)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86SchedIceLake.td:391
 defm : ICXWriteResPair<WritePMULLDZ,  [ICXPort05], 10, [2], 2, 7>;
-defm : ICXWriteResPair<WriteShuffle,  [ICXPort5], 1, [1], 1, 5>; // Vector shuffles.
-defm : ICXWriteResPair<WriteShuffleX, [ICXPort5], 1, [1], 1, 6>;
-defm : ICXWriteResPair<WriteShuffleY, [ICXPort5], 1, [1], 1, 7>;
-defm : ICXWriteResPair<WriteShuffleZ, [ICXPort5], 1, [1], 1, 7>;
-defm : ICXWriteResPair<WriteVarShuffle,  [ICXPort5], 1, [1], 1, 5>; // Vector variable shuffles.
-defm : ICXWriteResPair<WriteVarShuffleX, [ICXPort5], 1, [1], 1, 6>;
-defm : ICXWriteResPair<WriteVarShuffleY, [ICXPort5], 1, [1], 1, 7>;
-defm : ICXWriteResPair<WriteVarShuffleZ, [ICXPort5], 1, [1], 1, 7>;
+defm : ICXWriteResPair<WriteShuffle,  [ICXPort5],  1, [1], 1, 5>; // Vector shuffles.
+defm : ICXWriteResPair<WriteShuffleX, [ICXPort15], 1, [1], 1, 6>;
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pengfei wrote:
> What's `WriteShuffle` used for? I saw some `*Z128` use it as well. Why does it only work on port5?
Its mainly for MMX shuffles


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Comment at: llvm/lib/Target/X86/X86SchedIceLake.td:668
+                                            "VPBROADCAST(D|Q)rr",
+                                            "(V)?PALIGNR(Y|Z128|Z256)?rri",
+                                            "(V?)PACK(U|S)S(DW|WB)(Y|Z128|Z256)?rr")>;
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pengfei wrote:
> pengfei wrote:
> > Just for curious, what's the difference between `(V)?` and `(V?)`
> `Y|Z|Z128|Z256`?
> Just for curious, what's the difference between (V)? and (V?)

I think for single cases inside the () there isn't any - I'll try to be consistent




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  https://reviews.llvm.org/D115547/new/

https://reviews.llvm.org/D115547