[PATCH] D115439: [AMDGPU] Add AV class spill pseudo instructions

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas updated this revision to Diff 393180.
cdevadas added a comment.

Considered the max size for AV spills the same as AGPRs.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115439/new/

https://reviews.llvm.org/D115439

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
  llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
  llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
  llvm/test/CodeGen/AMDGPU/spill-agpr.ll
  llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll