[PATCH] D115439: [AMDGPU] Add AV class spill pseudo instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM with the pseudo code size fix. I'm surprised this didn't require any changes for the expansion



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Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:764
 
+defm SI_SPILL_AV32  : SI_SPILL_VGPR <AV_32>;
+defm SI_SPILL_AV64  : SI_SPILL_VGPR <AV_64>;
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Needs to set 1 parameter like the AGPR cases?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115439/new/

https://reviews.llvm.org/D115439