[PATCH] D115352: [AArch64] Add mayRaiseFPException to appropriate instructions

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

It looks like we have to do this very carefully to do it in a way that doesn't alter non-strict codegen for the worse, especially in making sure that nofpexcept flags are set everywhere. As far as I understand it should be an NFC there. The MachineCombiner isn't propagating flags at the moment, for example.



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Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:5023
 
+multiclass SingleOperandFPDataNoException<bits<4> opcode, string asm,
+                                       SDPatternOperator node = null_frag>
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Do we need to add this, or is it simpler to pass fpexceptions=0 from where it is used?


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https://reviews.llvm.org/D115352