[PATCH] D115352: [AArch64] Add mayRaiseFPException to appropriate instructions

[John Brawn via Phabricator via llvm-commits]

john.brawn created this revision.
john.brawn added reviewers: t.p.northover, kpn, dmgreen, bsmith.
Herald added subscribers: arphaman, hiraditya, kristof.beyls.
john.brawn requested review of this revision.
Herald added a project: LLVM.

This is mostly handled by adding "let mayRaiseFPException = 1" before the definition of the relevant instruction classes, but there are a couple of complications:

- When we have a multiclass where currently some instantiations are of instructions that can raise an exception and others aren't we need to split that into two multiclasses, one inheriting from the other using a multiclass parameter to enable exceptions.
- In a couple of places in the globalisel instruction selector we need to manually set the NoFPExcept flag. There's also another place that looks like it should need it, but that code is never hit for those opcodes due to them being handled by the generic instruction selector, so I've instead just removed them from the switch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D115352

Files:
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-ceil.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-faddp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-floor.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-fma.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-fmul-indexed.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-frint-nofp16.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-frint.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-round.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-trunc.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-nearbyint.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vector-fcmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-sqrt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select.mir
  llvm/test/CodeGen/AArch64/strict-fp-opt.ll

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