[PATCH] D115176: [ARM] Peek through And 1 in IsCMPZCSINC

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 7 06:47:07 PST 2021


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14623
+
+  // Ignore any zext and nodes that may not yet have been removed.
+  while (CSInc.getOpcode() == ISD::AND &&
----------------
SjoerdMeijer wrote:
> The problem with these end-to-end test that we have for this code is that we are not testing things in isolation here, and that the patterns are difficult to see.... perhaps I am missing context or something else, but can you clarify with a "zext and" nodes is? I am just failing to see what the `AND 1` is doing here.
By "zext and" I just meant the And that are produces by legalizing an i1 zext. So from a `zext i1 %x to i32`, we legalize the %x to an i32 and add an `and %x, 1` to make sure the value is correct. The operator we test for in this function can only produce 0 or 1, so it doesn't matter much if we And that with 1, we will remain at the same value.

Those extra `And 1`'s will be removed later, because we know they don't do anything. By that point we may not re-visit this node to do this transform, though. Hence the improvement in some of the tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115176/new/

https://reviews.llvm.org/D115176



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