[PATCH] D115156: [AArch64][SVE] Fix ICE extracting fixedvec from scalable load

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll:410
 }
 
+define <4 x i32> @typesize_regression_test_v4i32(i32* %addr, i64 %idx) {
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Consider adding a short comment explaining whats going on like the other tests in this file. It's a bit hard (at least for me) to tell exactly what regression is being asserted from the test name alone


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115156/new/

https://reviews.llvm.org/D115156