[PATCH] D115097: [VE] Change to use R_VE_SREL32
Kazushi Marukawa via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 6 03:06:57 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6b41eb7f26d0: [VE] Change to use R_VE_SREL32 (authored by kaz7).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115097/new/
https://reviews.llvm.org/D115097
Files:
llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
llvm/test/MC/VE/sym-br.s
Index: llvm/test/MC/VE/sym-br.s
===================================================================
--- llvm/test/MC/VE/sym-br.s
+++ llvm/test/MC/VE/sym-br.s
@@ -11,6 +11,6 @@
# CHECK-NEXT: b.l.t tgt+24(, %s1)
# CHECK-OBJ: 0 R_VE_REFLONG tgt
-# CHECK-OBJ: 8 R_VE_PC_LO32 tgt2
+# CHECK-OBJ: 8 R_VE_SREL32 tgt2
# CHECK-OBJ: 10 R_VE_REFLONG tgt
# CHECK-OBJ: 18 R_VE_REFLONG tgt+0x18
Index: llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
===================================================================
--- llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
+++ llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
@@ -131,7 +131,7 @@
return getMachineOpValue(MI, MO, Fixups, STI);
Fixups.push_back(
- MCFixup::create(0, MO.getExpr(), (MCFixupKind)VE::fixup_ve_pc_lo32));
+ MCFixup::create(0, MO.getExpr(), (MCFixupKind)VE::fixup_ve_srel32));
return 0;
}
Index: llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
===================================================================
--- llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
+++ llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
@@ -17,6 +17,9 @@
/// fixup_ve_reflong - 32-bit fixup corresponding to foo
fixup_ve_reflong = FirstTargetFixupKind,
+ /// fixup_ve_srel32 - 32-bit fixup corresponding to foo for relative branch
+ fixup_ve_srel32,
+
/// fixup_ve_hi32 - 32-bit fixup corresponding to foo at hi
fixup_ve_hi32,
Index: llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
===================================================================
--- llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
+++ llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
@@ -56,6 +56,8 @@
return ELF::R_VE_REFLONG;
case FK_PCRel_8:
return ELF::R_VE_REFQUAD;
+ case VE::fixup_ve_srel32:
+ return ELF::R_VE_SREL32;
case VE::fixup_ve_pc_hi32:
return ELF::R_VE_PC_HI32;
case VE::fixup_ve_pc_lo32:
@@ -76,6 +78,8 @@
return ELF::R_VE_REFQUAD;
case VE::fixup_ve_reflong:
return ELF::R_VE_REFLONG;
+ case VE::fixup_ve_srel32:
+ llvm_unreachable("Unimplemented fixup pc_hi32 -> relocation");
case VE::fixup_ve_hi32:
return ELF::R_VE_HI32;
case VE::fixup_ve_lo32:
Index: llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
===================================================================
--- llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
+++ llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
@@ -42,6 +42,7 @@
case VE::fixup_ve_tpoff_hi32:
return (Value >> 32) & 0xffffffff;
case VE::fixup_ve_reflong:
+ case VE::fixup_ve_srel32:
case VE::fixup_ve_lo32:
case VE::fixup_ve_pc_lo32:
case VE::fixup_ve_got_lo32:
@@ -68,6 +69,7 @@
case FK_Data_4:
case FK_PCRel_4:
case VE::fixup_ve_reflong:
+ case VE::fixup_ve_srel32:
case VE::fixup_ve_hi32:
case VE::fixup_ve_lo32:
case VE::fixup_ve_pc_hi32:
@@ -103,6 +105,7 @@
const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = {
// name, offset, bits, flags
{"fixup_ve_reflong", 0, 32, 0},
+ {"fixup_ve_srel32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
{"fixup_ve_hi32", 0, 32, 0},
{"fixup_ve_lo32", 0, 32, 0},
{"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
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