[llvm] 6b41eb7 - [VE] Change to use R_VE_SREL32

[Kazushi Marukawa via llvm-commits]

Author: Kazushi (Jam) Marukawa
Date: 2021-12-06T20:06:37+09:00
New Revision: 6b41eb7f26d06ce018c0218360f9cdec239f2caa

URL: https://github.com/llvm/llvm-project/commit/6b41eb7f26d06ce018c0218360f9cdec239f2caa
DIFF: https://github.com/llvm/llvm-project/commit/6b41eb7f26d06ce018c0218360f9cdec239f2caa.diff

LOG: [VE] Change to use R_VE_SREL32

Change to use R_VE_SREL32 for relative branch instructions instead of
R_VE_PC_LO32 in order to check ranges of relative branch isntructions
at link time correctly.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D115097

Added: 
    

Modified: 
    llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
    llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
    llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
    llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
    llvm/test/MC/VE/sym-br.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
index 29c209934680a..38d163b370801 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
@@ -42,6 +42,7 @@ static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
   case VE::fixup_ve_tpoff_hi32:
     return (Value >> 32) & 0xffffffff;
   case VE::fixup_ve_reflong:
+  case VE::fixup_ve_srel32:
   case VE::fixup_ve_lo32:
   case VE::fixup_ve_pc_lo32:
   case VE::fixup_ve_got_lo32:
@@ -68,6 +69,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
   case FK_Data_4:
   case FK_PCRel_4:
   case VE::fixup_ve_reflong:
+  case VE::fixup_ve_srel32:
   case VE::fixup_ve_hi32:
   case VE::fixup_ve_lo32:
   case VE::fixup_ve_pc_hi32:
@@ -103,6 +105,7 @@ class VEAsmBackend : public MCAsmBackend {
     const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = {
         // name, offset, bits, flags
         {"fixup_ve_reflong", 0, 32, 0},
+        {"fixup_ve_srel32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
         {"fixup_ve_hi32", 0, 32, 0},
         {"fixup_ve_lo32", 0, 32, 0},
         {"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},

diff  --git a/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
index 741e8320a9411..c1d18dc4f9daa 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
@@ -56,6 +56,8 @@ unsigned VEELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
       return ELF::R_VE_REFLONG;
     case FK_PCRel_8:
       return ELF::R_VE_REFQUAD;
+    case VE::fixup_ve_srel32:
+      return ELF::R_VE_SREL32;
     case VE::fixup_ve_pc_hi32:
       return ELF::R_VE_PC_HI32;
     case VE::fixup_ve_pc_lo32:
@@ -76,6 +78,8 @@ unsigned VEELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
     return ELF::R_VE_REFQUAD;
   case VE::fixup_ve_reflong:
     return ELF::R_VE_REFLONG;
+  case VE::fixup_ve_srel32:
+    llvm_unreachable("Unimplemented fixup pc_hi32 -> relocation");
   case VE::fixup_ve_hi32:
     return ELF::R_VE_HI32;
   case VE::fixup_ve_lo32:

diff  --git a/llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h b/llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
index 5d5dc1c5c891a..46b995cee840a 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h
@@ -17,6 +17,9 @@ enum Fixups {
   /// fixup_ve_reflong - 32-bit fixup corresponding to foo
   fixup_ve_reflong = FirstTargetFixupKind,
 
+  /// fixup_ve_srel32 - 32-bit fixup corresponding to foo for relative branch
+  fixup_ve_srel32,
+
   /// fixup_ve_hi32 - 32-bit fixup corresponding to foo at hi
   fixup_ve_hi32,
 

diff  --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
index d50d8fcae9daa..878a3f6e69dce 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
@@ -131,7 +131,7 @@ VEMCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
     return getMachineOpValue(MI, MO, Fixups, STI);
 
   Fixups.push_back(
-      MCFixup::create(0, MO.getExpr(), (MCFixupKind)VE::fixup_ve_pc_lo32));
+      MCFixup::create(0, MO.getExpr(), (MCFixupKind)VE::fixup_ve_srel32));
   return 0;
 }
 

diff  --git a/llvm/test/MC/VE/sym-br.s b/llvm/test/MC/VE/sym-br.s
index 8e054791de74a..1589ccc899c4f 100644
--- a/llvm/test/MC/VE/sym-br.s
+++ b/llvm/test/MC/VE/sym-br.s
@@ -11,6 +11,6 @@
 # CHECK-NEXT: b.l.t tgt+24(, %s1)
 
 # CHECK-OBJ: 0 R_VE_REFLONG tgt
-# CHECK-OBJ: 8 R_VE_PC_LO32 tgt2
+# CHECK-OBJ: 8 R_VE_SREL32 tgt2
 # CHECK-OBJ: 10 R_VE_REFLONG tgt
 # CHECK-OBJ: 18 R_VE_REFLONG tgt+0x18