[PATCH] D114946: [AArch64] Add instruction selection for strict FP

[John Brawn via Phabricator via llvm-commits]

john.brawn created this revision.
john.brawn added reviewers: t.p.northover, kpn, dmgreen, bsmith.
Herald added subscribers: hiraditya, kristof.beyls.
john.brawn requested review of this revision.
Herald added a project: LLVM.

This mostly consists of adjusting patterns so that 'op' is 'any_op', but there are a few things that required more work:

- SelectionDAGLegalize::PromoteNode was missing handling for some strict fp opcodes.
- Some of the custom lowering was missing handling for fp16.
- Custom lowering needed to be added for round-to-int operations.

More work needs to be done for full strict fp support (marking instructions that can raise exceptions as such, and modelling FPCR use for controlling rounding), but having instruction selection is enough for us to set IsStrictFPEnabled = true.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114946

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/fp-intrinsics.ll

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