[PATCH] D114804: [RISCV] Align odd address in assemble code

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


================
Comment at: llvm/test/MC/RISCV/align-odd.s:19
+
+#      RV64-C-EXT-NORELAX:  0: 01 00
+# RV64-C-EXT-NORELAX-NEXT:  2: 00 00
----------------
Pad after the colon not before the CHECK prefix


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Comment at: llvm/test/MC/RISCV/align-odd.s:20
+#      RV64-C-EXT-NORELAX:  0: 01 00
+# RV64-C-EXT-NORELAX-NEXT:  2: 00 00
+# RV64-C-EXT-NORELAX-NEXT:  4: 00 00
----------------
Why a two space gap?


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Comment at: llvm/test/MC/RISCV/align-odd.s:46
+# RV64-C-EXT-RELAX-NEXT:  2: 00 00
+# RV64-C-EXT-RELAX-NEXT:  4: 00 13
+# RV64-C-EXT-RELAX-NEXT:  6: 00 00
----------------
These are still broken, and we should probably be checking where the R_RISCV_RELAX is pointing


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Comment at: llvm/test/MC/RISCV/align-odd.s:69
+
+
+#      RV32-RELAX:  0: 01 00
----------------
Double blank line


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Comment at: llvm/test/MC/RISCV/align-odd.s:78
+
+
+.byte 1
----------------
Double blank line


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D114804/new/

https://reviews.llvm.org/D114804