[PATCH] D113353: [RISCV] Add scheduling resources for Vector pseudo instructions.
    Hsiangkai Wang via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Sat Nov 27 06:32:55 PST 2021
    
    
  
HsiangKai updated this revision to Diff 390160.
HsiangKai added a comment.
Address comments.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113353/new/
https://reviews.llvm.org/D113353
Files:
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVSchedRocket.td
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D113353.390160.patch
Type: text/x-patch
Size: 70634 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211127/dc662af6/attachment-0001.bin>
    
    
More information about the llvm-commits
mailing list