[PATCH] D114640: [PowerPC] Handle Vector Sum Reducation

Stefan Pintilie via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 26 06:58:54 PST 2021


stefanp created this revision.
stefanp added reviewers: nemanjai, lei.
Herald added subscribers: shchenz, kbarton, hiraditya.
stefanp requested review of this revision.
Herald added a project: LLVM.

Better codegen is possible for Vector Sum Reduction on Power 9 and up.
This patch adds handling for several vector sum reductions depending
on the type of the vector.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114640

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
  llvm/test/CodeGen/PowerPC/vector-reduce-add.ll

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