[PATCH] D114582: [SDAG] Refine MMO size when converting masked load/store to normal load/store
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 25 04:27:59 PST 2021
dmgreen created this revision.
dmgreen added reviewers: efriedma, yubing, craig.topper, RKSimon, SjoerdMeijer, nikic, kparzysz.
Herald added subscribers: ecnelises, pengfei, hiraditya.
dmgreen requested review of this revision.
Herald added a project: LLVM.
After D113888 <https://reviews.llvm.org/D113888> / 32b6c17b29079e7d <https://reviews.llvm.org/rG32b6c17b29079e7d2ac61cdc90b10983ee97d78d> the MMO size of a masked loads/store is unknown. When we are converting back to a standard load/store because the mask is known all ones, we can refine that to the correct size from the size of the vector being loaded/stored.
https://reviews.llvm.org/D114582
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/X86/masked_loadstore_split.ll
Index: llvm/test/CodeGen/X86/masked_loadstore_split.ll
===================================================================
--- llvm/test/CodeGen/X86/masked_loadstore_split.ll
+++ llvm/test/CodeGen/X86/masked_loadstore_split.ll
@@ -10,7 +10,7 @@
; CHECK-NEXT: [[AVX_SET0_:%[0-9]+]]:vr256 = AVX_SET0
; CHECK-NEXT: [[VMOVAPSYrm:%[0-9]+]]:vr256 = VMOVAPSYrm $rip, 1, $noreg, %const.0, $noreg :: (load (s256) from constant-pool)
; CHECK-NEXT: VMASKMOVPDYmr [[COPY]], 1, $noreg, 32, $noreg, killed [[VMOVAPSYrm]], [[AVX_SET0_]] :: (store unknown-size into %ir.0 + 32, align 8)
- ; CHECK-NEXT: VMOVUPDYmr [[COPY]], 1, $noreg, 0, $noreg, [[AVX_SET0_]] :: (store unknown-size into %ir.0, align 8)
+ ; CHECK-NEXT: VMOVUPDYmr [[COPY]], 1, $noreg, 0, $noreg, [[AVX_SET0_]] :: (store (s256) into %ir.0, align 8)
; CHECK-NEXT: RET 0
entry:
call void @llvm.masked.store.v8f64.p0v8f64(<8 x double> zeroinitializer, <8 x double>* %0, i32 8, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false>)
@@ -25,7 +25,7 @@
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
; CHECK-NEXT: [[VMOVAPSYrm:%[0-9]+]]:vr256 = VMOVAPSYrm $rip, 1, $noreg, %const.0, $noreg :: (load (s256) from constant-pool)
; CHECK-NEXT: [[VMASKMOVPDYrm:%[0-9]+]]:vr256 = VMASKMOVPDYrm killed [[VMOVAPSYrm]], [[COPY]], 1, $noreg, 32, $noreg :: (load unknown-size from %ir.0 + 32, align 8)
- ; CHECK-NEXT: [[VMOVUPDYrm:%[0-9]+]]:vr256 = VMOVUPDYrm [[COPY]], 1, $noreg, 0, $noreg :: (load unknown-size from %ir.0, align 8)
+ ; CHECK-NEXT: [[VMOVUPDYrm:%[0-9]+]]:vr256 = VMOVUPDYrm [[COPY]], 1, $noreg, 0, $noreg :: (load (s256) from %ir.0, align 8)
; CHECK-NEXT: $ymm0 = COPY [[VMOVUPDYrm]]
; CHECK-NEXT: $ymm1 = COPY [[VMASKMOVPDYrm]]
; CHECK-NEXT: RET 0, $ymm0, $ymm1
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9940,11 +9940,16 @@
// If this is a masked load with an all ones mask, we can use a unmasked load.
// FIXME: Can we do this for indexed, compressing, or truncating stores?
- if (ISD::isConstantSplatVectorAllOnes(Mask.getNode()) &&
- MST->isUnindexed() && !MST->isCompressingStore() &&
- !MST->isTruncatingStore())
+ if (ISD::isConstantSplatVectorAllOnes(Mask.getNode()) && MST->isUnindexed() &&
+ !MST->isCompressingStore() && !MST->isTruncatingStore()) {
+ unsigned Size = MemoryLocation::getSizeOrUnknown(
+ MST->getMemoryVT().getStoreSize());
+ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
+ MST->getPointerInfo(), MachineMemOperand::MOStore, Size,
+ MST->getOriginalAlign(), MST->getAAInfo(), MST->getRanges());
return DAG.getStore(MST->getChain(), SDLoc(N), MST->getValue(),
- MST->getBasePtr(), MST->getMemOperand());
+ MST->getBasePtr(), MMO);
+ }
// Try transforming N to an indexed store.
if (CombineToPreIndexedLoadStore(N) || CombineToPostIndexedLoadStore(N))
@@ -9997,11 +10002,15 @@
// If this is a masked load with an all ones mask, we can use a unmasked load.
// FIXME: Can we do this for indexed, expanding, or extending loads?
- if (ISD::isConstantSplatVectorAllOnes(Mask.getNode()) &&
- MLD->isUnindexed() && !MLD->isExpandingLoad() &&
- MLD->getExtensionType() == ISD::NON_EXTLOAD) {
+ if (ISD::isConstantSplatVectorAllOnes(Mask.getNode()) && MLD->isUnindexed() &&
+ !MLD->isExpandingLoad() && MLD->getExtensionType() == ISD::NON_EXTLOAD) {
+ unsigned Size = MemoryLocation::getSizeOrUnknown(
+ MLD->getMemoryVT().getStoreSize());
+ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
+ MLD->getPointerInfo(), MachineMemOperand::MOLoad, Size,
+ MLD->getOriginalAlign(), MLD->getAAInfo(), MLD->getRanges());
SDValue NewLd = DAG.getLoad(N->getValueType(0), SDLoc(N), MLD->getChain(),
- MLD->getBasePtr(), MLD->getMemOperand());
+ MLD->getBasePtr(), MMO);
return CombineTo(N, NewLd, NewLd.getValue(1));
}
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