[PATCH] D114541: [CodeGen] Add scalable vector support for lowering of llvm.get.active.lane.mask

[David Sherwood via Phabricator via llvm-commits]

david-arm added a comment.

Hi @SjoerdMeijer, yeah it's really just a safety net, although for SVE there are times when we can't lower this directly to the 'whilelo' instruction. For example, the instruction doesn't support illegal types such as nxv32i1, or inputs that are i8, etc. If we do find ourselves hitting these cases at some point we can look at improving them I guess?


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