[PATCH] D109301: [AMDGPU] Enable copy between VGPR and AGPR classes during regalloc
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 24 22:51:14 PST 2021
cdevadas updated this revision to Diff 389662.
cdevadas added a comment.
Suggestions addressed.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109301/new/
https://reviews.llvm.org/D109301
Files:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
llvm/test/CodeGen/AMDGPU/spill-agpr.ll
llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
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