[PATCH] D109301: [AMDGPU] Enable copy between VGPR and AGPR classes during regalloc

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/spill-agpr.ll:107
+; GCN: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
+; GCN-COUNT-4: buffer_store_dword
+; GCN: v_mfma_f32_4x4x1f32
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It is not clear what's stored and what's loaded in this test and what are register classes here. I think this is important for this patch.


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Comment at: llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll:233
 
 ; FIXME: adding an AReg_1024 register class for v32f32 and v32i32
 ;        produces unnecessary copies and we still have some amount
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This comment is probably not relevant anymore?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109301/new/

https://reviews.llvm.org/D109301