[PATCH] D114357: [CodeGen] Change getAnyExtOrTrunc to use SIGN_EXTEND for some constants

Wed Nov 24 01:42:54 PST 2021

peterwaller-arm added a comment.

Couple of discussion points. I can see the rationale, but I wonder about some of the test changes and whether this could be revealing a latent bug.

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Comment at: llvm/test/CodeGen/X86/vector-fshl-512.ll:1107
 ; AVX512VL-NEXT:    vpunpckhbw {{.*#+}} ymm3 = ymm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
-; AVX512VL-NEXT:    vbroadcasti128 {{.*#+}} ymm4 = [1,128,64,32,16,8,4,2,1,128,64,32,16,8,4,2]
+; AVX512VL-NEXT:    vbroadcasti128 {{.*#+}} ymm4 = [1,65408,64,32,16,8,4,2,1,65408,64,32,16,8,4,2]
 ; AVX512VL-NEXT:    # ymm4 = mem[0,1,0,1]
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Can anyone comment if the sign extensions in these constants are NFC?

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Comment at: llvm/test/CodeGen/X86/vector-shift-shl-512.ll:334
 ; AVX512BW-NEXT:    vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55]
-; AVX512BW-NEXT:    vpsllvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
+; AVX512BW-NEXT:    vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
 ; AVX512BW-NEXT:    vpandq %zmm2, %zmm0, %zmm0
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Can anyone comment if these sll -> mul changes are expected & harmless?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114357/new/

https://reviews.llvm.org/D114357