[PATCH] D114357: [CodeGen] Change getAnyExtOrTrunc to use SIGN_EXTEND for some constants

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 22 03:57:23 PST 2021


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When we know the value we're extending is a constant that has the sign
bit set then it makes sense to use SIGN_EXTEND because this may improve
code quality in some cases, particularly when doing a constant splat of
an unpacked vector type. For example, for SVE when splatting the value
-1 into all elements of a vector of type <vscale x 2 x i32> the element
type will get promoted from i32 -> i64. In this case we want the splat
value to sign-extend from (i32 -1) -> (i64 -1), whereas currently it
zero-extends from (i32 -1) -> (i64 0xFFFFFFFF). Sign-extending the
constant means we can use a single mov immediate instruction.

New tests added here:

  CodeGen/AArch64/sve-vector-splat.ll

I believe we see some code quality improvements in these existing
tests too:

  CodeGen/PowerPC/combine_ext_trunc.ll
  CodeGen/X86/vector-rotate-512.ll


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114357

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/sve-vector-splat.ll
  llvm/test/CodeGen/PowerPC/and-mask.ll
  llvm/test/CodeGen/PowerPC/bool-math.ll
  llvm/test/CodeGen/PowerPC/combine_ext_trunc.ll
  llvm/test/CodeGen/PowerPC/shift-cmp.ll
  llvm/test/CodeGen/X86/min-legal-vector-width.ll
  llvm/test/CodeGen/X86/vector-fshl-256.ll
  llvm/test/CodeGen/X86/vector-fshl-512.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
  llvm/test/CodeGen/X86/vector-fshr-256.ll
  llvm/test/CodeGen/X86/vector-fshr-512.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
  llvm/test/CodeGen/X86/vector-rotate-128.ll
  llvm/test/CodeGen/X86/vector-rotate-256.ll
  llvm/test/CodeGen/X86/vector-rotate-512.ll
  llvm/test/CodeGen/X86/vector-shift-shl-256.ll
  llvm/test/CodeGen/X86/vector-shift-shl-512.ll

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